Lattice Semiconductor Demonstration of Speed Sign Detection Using ECP5 and Machine Learning

JP Singh, Automotive Marketing manager at Lattice Semiconductor, delivers a product demonstration at the May 2018 Embedded Vision Summit. Specifically, Singh demonstrates a machine learning CNN implemented using the company’s sensAI stack on a ECP5 FPGA. Singh shows the detection of speed limit signs and the determination of speed limits with a CNN implementation that consumes less than 1 Watt of power, in an ECP5 FPGA that is production-priced around $10.

This demonstration has a wide variety of applications in both commercial and consumer vehicles, and for both OEMs and after-market manufacturers. The ready-to-use reference design, IP core and software tools used in this demo are available to download from Lattice’s website.

Here you’ll find a wealth of practical technical insights and expert advice to help you bring AI and visual intelligence into your products without flying blind.

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Berkeley Design Technology, Inc.
PO Box #4446
Walnut Creek, CA 94596

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Phone: +1 (925) 954-1411
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