“Highly Efficient, Scalable Vision and AI Processors IP for the Edge,” a Presentation from Cadence

Pulin Desai, Vision Product Marketing Director at Cadence, presents the "Highly Efficient, Scalable Vision and AI Processors IP for the Edge" tutorial at the May 2019 Embedded Vision Summit.

This presentation describes the architecture of the latest Tensilica-based vision and AI processor family, and illustrates how easily vision algorithms (e.g., SLAM, 3D capture) and AI inference can be implemented on these processors. See how this low-power architecture simplifies development of a scalable vision and AI solution from low to high end for mobile, AR/VR, surveillance and automotive markets.

Here you’ll find a wealth of practical technical insights and expert advice to help you bring AI and visual intelligence into your products without flying blind.

Contact

Address

Berkeley Design Technology, Inc.
PO Box #4446
Walnut Creek, CA 94596

Phone
Phone: +1 (925) 954-1411
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