On April 29, 2025 from 9:00 AM to 6:00 PM PT, Alliance Member company Andes Technology will deliver the RISC-V CON Silicon Valley event at the DoubleTree Hotel by Hilton in San Jose, CA. Jeff Bier, Founder of the Edge AI and Vision Alliance, will be one of the invited guest speakers. From the event page:
Explore Two Dynamic Tracks:
- Main Conference & Exhibits – Open to all attendees!
- Developer Track – Hands-on technical training for engineers ( limited seating)
Main Conference & Exhibits – Connect, Learn, and Network!
- Hear from top industry leaders about the latest advancements in RISC-V.
- Explore cutting-edge exhibits from companies including Andes, Baya, BrainChip, Cornami, Cycuity, EdgeQ, IAR, QuickLogic, Siemens, and more.
- Gain insights into real-world applications in AI, Automotive, Application Processing, Communications, and Security.
- Enjoy extended networking breaks, lunch, and an evening reception.
Developer Track – Hands-on Technical Training (Limited Seats!)
Four in-depth, 1-hour sessions designed for engineers who want to dive deep into RISC-V technology. Bring your laptop fully charged!
Developer Track seating is limited – be sure to select this option when registering!
- Optimization with RISC-V Vector ISA – Curious about RISC-V Vectors (RVV) but unsure how it works? This session covers the basics and how it boosts vector performance. You will get hands-on experience writing and running vector software using AndeSight tools on RVV-capable processors.
- IAR Professional Tools for RISC-V – Learn how professional tools can help you debug your application more quickly and efficiently, accelerating your time to market. Also, discover how prequalified Functional Safety tools can enhance your products.
- Create Your Own RISC-V Custom Instructions – Want to create your own RISC-V Instructions to accelerate your application? This session explores Andes’ Automated Custom Extensions (ACE) for enhancing the RISC-V ISA, with a hands-on demo using Andes Copilot, which automates much of the process.
- Optimizing SoC Performance with Baya’s WeaverPro™ Software – Building a complex SoC with high memory demands? Avoid surprises! See how WeaverPro software analyzes CPU/GPU traces to uncover bottlenecks, validate enhancements, and optimize performance. A deep-dive demo will show how to collect data, run simulations, and refine your design.
For more information and to register, visit the event page.
