This blog post was originally published at Ambarella’s website. It is reprinted here with the permission of Ambarella.
Modern cars are becoming more sophisticated by continually integrating additional technologies that lower dependencies on a person’s capability to drive, without compromising safety. These systems are called Advanced Driver-Assistance Systems (ADAS), and they use a variety of methods, including cameras as “eyes” on the road, that can aid a person when driving.
A lot of effort is being made to lower the latency and increase the performance of ADAS systems so they will become even more useful and dependable for drivers. Among these efforts is the development of “instant-on” or fast-boot performance that will allow your ADAS system to be ready as soon as you start the car, as well as a quick-reset feature for faster system responsiveness. The need for a fast-boot feature has become increasingly apparent, with the advent of automotive applications that have hard requirements for responding to commands from ECUs over the CAN bus, as well as the system’s ability to immediately feed video to e-mirrors and the displays from rear- or surround-view camera systems.
Micron is working with Ambarella to support the fast-boot performance needs of their CV22FS and CV2FS AI vision SoCs. These ASIL B-compliant SoCs with functional safety address multiple different automotive applications, such as front-facing monocular and stereovision ADAS cameras, in-cabin driver and occupant monitoring systems (DMS/OMS), electronic mirrors, as well as computer vision ECUs for L2+ and higher levels of autonomy. To enable fast-boot performance, these SoCs support the Xccela™ bus interface, which Ambarella is using to connect with Micron’s AEC-Q100 compliant Xccela Flash memory on its CV22FS/CV2FS SoC development board.
Xccela Flash is the latest NOR product at Micron that supports the x1 SPI bus, and the Xccela bus interface which is a JEDEC xSPI-compliant Octal I/O interface developed and promoted by the Xccela Consortium. This advanced memory bus can provide a maximum clock frequency of 200MHz in double data rate (DDR) mode along with the data strobe, or 400MB/s read throughput.
Comparing the read performance of Xccela Flash with the other Flash memories in the graph below, Xccela Flash outshines the others by almost 5x within the range of 16Bytes-256Bytes per fetch during cache line fills.
To illustrate the fast boot performance of Micron’s Xccela Flash on an actual system, Ambarella has done measurements on its CV2FS AI vision SoC board comparing Xccela Flash with another boot solution on the same board, such as Micron’s Serial NAND.
Note: Test done on Ambarella CV2FS development board at 100MHz with 7948 KB firmware
The above graph shows that the Micron’s Xccela Flash interface, even in SDR (Single-Data Rate) mode, has 3.28x faster boot performance than Micron’s Serial NAND, running on the Ambarella CV2FS SoC development board.
Ambarella has successfully demonstrated that they can achieve fast-boot performance on their CV2FS/CV22FS development board using Micron’s Xccela Flash. Check out: https://www.ambarella.com/products/automotive/ for more information about Ambarella’s CV2FS and CV22FS AI vision SoCs with functional safety, and https://www.micron.com/products/nor-flash/xccela-flash for more information about Micron’s automotive-grade Xccela Flash.
Udit Budhia
Director of Marketing Communications, Ambarella
Redge Villanueva
Senior Ecosystem Enabling Manager, Micron Technology
