Cadence verification and RTL-to-GDS digital full-flow tuned for automotive safety, quality and reliability requirements 18 Jun 2024 – At embedded world 2024, Cadence and Dream Chip demonstrated Dream Chip’s latest automotive SoC, which features the Cadence® Tensilica® Vision P6 DSP IP and Cadence design IP controllers and was taped out using the complete Cadence® Verification […]
Amol Borkar, Product Marketing Director at Cadence, presents the “Addressing Tomorrow’s Sensor Fusion and Processing Needs with Cadence’s Newest Processors” tutorial at the May 2024 Embedded Vision Summit. From ADAS to autonomous vehicles to smartphones, the number and variety of sensors used in edge devices is increasing: radar, LiDAR, time-of-flight… “Addressing Tomorrow’s Sensor Fusion and
Highlights: Single DSPs for embedded vision, radar, lidar and AI processing boost performance while providing significant area, power and cost savings New radar accelerator provides a highly programmable hardware solution for offloading 4D imaging radar workloads, increasing performance Designed for sensor fusion processing in multi-sensor automotive, drone, robotics and autonomous vehicle system designs SAN JOSE,
This blog post was originally published at Arm’s website. It is reprinted here with the permission of Arm. AMBA is being extended to the chiplets market with the new CHI C2C specification. As Arm’s EVP and Chief Architect Richard Grisenthwaite said in this blog, Arm is collaborating across the ecosystem on standards to enable a
Ecosystem Collaboration Drives New AMBA Specification for Chiplets Read More +
This blog post was originally published at Arm’s website. It is reprinted here with the permission of Arm. Strategic collaboration accelerates Custom Silicon for evolving AI workloads As AI continues its rapid evolution, optimized silicon is crucial to unlock next-generation applications. Arm serves as a foundation for this innovation with its CPU, GPU and related
The Age of AI Demands Faster Chip Development: Only Arm and Cadence Deliver Read More +
This blog post was originally published at Cadence’s website. It is reprinted here with the permission of Cadence. The Goal: Long Shelf Life Chips being designed today for the automotive, mobile handset, AI-IoT (artificial intelligence – Internet of things), and other AI applications will be fabricated in a year or two, designed into end products
Why a DSP is Indispensable in the New World of AI Read More +
AI enhancements and Tensilica Xtensa LX8 platform capabilities deliver significant performance improvements with industry-best energy efficiency 24 Oct 2023 — SAN JOSE, Calif.— Cadence Design Systems, Inc.(Nasdaq: CDNS) today expanded its industry-leading Tensilica® HiFi and Vision DSP families with the introduction of four new DSPs based on the recently announced Tensilica Xtensa® LX8 processor platform.
Amol Borkar, Director of Product and Marketing for Vision and AI DSPs at Cadence Tensilica, demonstrates the company’s latest edge AI and vision technologies and products at the September 2023 Edge AI and Vision Alliance Forum. Specifically, Borkar demonstrates two applications running on customers’ SoCs, showcasing Cadence’s pervasiveness in AI. The first demonstration is of
Cadence Demonstrations of Generative AI and People Tracking at the Edge Read More +
Highlights: Neo NPUs efficiently offload from any host processor and scale from 8 GOPS to 80 TOPS in a single core, extending to hundreds of TOPS for multicore AI IP delivers industry-leading AI performance and energy efficiency for optimal PPA and cost points Targets a broad range of on-device and edge applications, including intelligent sensors,
Suhas Mitra, Director Product Management and Marketing at Cadence, demonstrates the company’s latest edge AI and vision technologies and products at the 2023 Embedded Vision Summit. Specifically, Mitra demonstrates Cadence’s Tensilica AI accelerator portfolio, specifically showcasing the company’s Tensilica NNA (Neural Network Accelerator) 110 IP. These IPs can significantly improve the performance of edge and
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