In the introductory essay to last Thursday's Embedded Vision Insights newsletter, and in speaking of Nokia's new cameraphone, I wrote: The Nokia 808 contains a 41 Mpixel image sensor (no, that's not a typo), notable not only for its high resolution but also for its relatively relaxed 1.4 um pixel pitch, the latter translating into […]
Image Sensor ISO: A ‘Where Does Noise Come From’ Tutorial Show Read More +
Kudos to EDN Magazine's Margery Conner for "tweeting" me a heads-up about a Samsung announcement at the recent ISSCC (International Solid State Circuits Conference), originally covered by Nikkei Business Publications' Tech-On! and later also picked up by Gizmodo, The Verge and TechCrunch. At first glance, the image sensor above may look like a convention Bayer-patterned
Time Of Flight: Samsung’s New RGB Image Sensor Also Has Depth Sight Read More +
By José Alvarez Video Technology Engineering Director Xilinx Corporation José Alvarez, Video Technology Engineering Director at Xilinx Corporation, introduces the basic steps in the development of embedded vision systems: overall system definition, building IP processing pipelines using simulation models to speed up evaluation, using Targeted Design Platforms for rapid exploration and implementation, and establishing a
Introduction to Video and Image Processing System Design Using FPGAs Read More +
Brian Dipert, Editor-In-Chief of the Embedded Vision Alliance, interviews Gene Frantz, Texas Instruments Principal Fellow. Gene, who has been with the company for nearly 40 years, did his early work with DSPs in association with the Speak & Spell speech synthesizer. In this two-part series, Gene and Brian discuss the history of the DSP both
Embedded Vision Alliance Conversation with Gene Frantz of Texas Instruments, Part One Read More +
Brian Dipert, Editor-In-Chief of the Embedded Vision Alliance, interviews Gene Frantz, Texas Instruments Principal Fellow. Gene, who has been with the company for nearly 40 years, did his early work with DSPs in association with the Speak & Spell speech synthesizer. In this two-part series, Gene and Brian discuss the history of the DSP both
Embedded Vision Alliance Conversation with Gene Frantz of Texas Instruments, Part Two Read More +
By Joseph Coombs and Rahul Prabhu Texas Instruments This is a reprint of a Texas Instruments-published white paper, which is also available here (365 KB PDF). Abstract In today’s advancing market, the growing performance and decreasing price of embedded processors are opening many doors for developers to design highly sophisticated solutions for different end applications.
By Brian Dipert Editor-In-Chief Embedded Vision Alliance Senior Analyst BDTI This article was originally published in the First Quarter 2012 issue (PDF) of the Xilinx Xcell Journal. It is reprinted here with the permission of Xilinx. A jointly developed reference design validates the potential of Xilinx’s Zynq device in a burgeoning application category. By Brian
Embedded Vision: FPGAs’ Next Notable Technology Opportunity Read More +
by Dong-Ik Ko and Gaurav Agarwal Texas Instruments This article was originally published in the December 2011 issue of Embedded Systems Programming. Gesture recognition is the first step to fully 3D interaction with computing devices. The authors outline the challenges and techniques to overcome them in embedded systems. As touchscreen technologies become more pervasive, users
Gesture Recognition–First Step Toward 3D UIs? Read More +
As I previously mentioned in a technical article published to the Embedded Vision Alliance site last August, the Bayer Pattern (named after Eastman Kodak's Bryce E. Bayer, its inventor) is by far the most common filter array pattern used with both CCDs and CMOS image sensors. Containing 50% green filters, 25% red filters and 25%
A Six-By-Six Pixel Cluster: Fujifilm Take Another Stab At The Image Sensor Read More +
By José Alvarez Video Technology Engineering Director Xilinx Corporation José Alvarez, Video Technology Engineering Director at Xilinx Corporation, follows up his premier video in this tutorial series with the discussion of a flexible ISP (image signal processing) implementation using readily available dynamic processing blocks in an FPGA.
Implementing an Image Signal Processing Pipeline using FPGAs Read More +
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